USB Component: USB Device
AN 702: Interfacing a USB PHY to the Hard Processor System USB 2.0 OTG Controller
The USB 2.0 Device IP core | Arasan Chip Systems
Confidently Characterize Validate and Debug Your USB 31 Electrical PHY Designs | Tektronix
ASMedia Demos USB 3.2 Gen 2x2 PHY, USB 3.2 Controller Due in 2019
High Speed Inter-CHIP USB 2.0 PHY | Arasan Chip Systems
USB 3.0 PHY (Host/Device/OTG/Hub) - IP Solution - INNOSILICON
USB3300 USB HS Board Host OTG PHY Low Pin ULPI Evaluation Development Module Kit|Computer Cables & Connectors| - AliExpress
USB3300 USB HS Board Host OTG PHY Low Pin ULPI Evaluation Development Module Kit|Integrated Circuits| - AliExpress
ULPI - Kcchao
PhyWhisperer-USB - NewAE Hardware Product Documentation
PhyWhisperer-USB | Crowd Supply
Canovatech - CT25201_PHY
USB 2.0 Device Controller for SoC Designs | Cadence IP
TUSB1210 data sheet, product information and support | TI.com
USB 2.0 Full High Speed Solution | NXP Semiconductors
Archimago's Musings: MEASUREMENTS: Computer USB port noise, USB hubs and the 8kHz PHY Microframe Packet Noise
PCIe/USB/SATA PHY Appilcation example | Renesas
Soft Mixed Signal Corporation USB 2.0 PHY IP Cores
Corigine Unveils First Certified SuperSpeed+ USB 3.1 Gen 2 IP with M31 28nm PHY | audioXpress
USB v2.0 Soft PHY and Device Controller
USB 2.0 PHY IP Device/Host/OTG/Hub (Silicon proven in TSMC 40LP /LL)
ASMedia Demos USB 3.2 Gen 2x2 PHY, USB 3.2 Controller Due in 2019
USB 3.0 PHY for SoC Designs | Cadence IP
